To increase density of a wiring pattern of a printed wiring board incorporating a semiconductor chip.
An element incorporated center layer substrate and a chip device accommodated in a cavity formed on the center layer substrate are provided on a first insulation layer. An electrode pattern is provided on a surface of the center layer substrate. The element incorporated center layer substrate has an element formed by electrically connecting with the electrode pattern. The first insulation layer has a conductive part made of a via hole filled with a conductive resin composition at a position connected with the chip device. A second insulation layer is provided on the element incorporated center layer substrate and the chip device. A via hole with a smaller area than that of the electrode pattern is provided on the electrode pattern. The via hole is electrically connected with the wiring pattern on the surface of the second insulation layer. The printed wiring board is thus manufactured.
KAWAMOTO KENJI
FURUYA AKIHIKO
SEKINE HIDEKATSU
