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Title:
PRINTED WIRING BOARD PATTERN DESIGN DEVICE AND MULTILAYER PATTERN PROCESSING METHOD
Document Type and Number:
Japanese Patent JP2001282881
Kind Code:
A
Abstract:

To facilitate formation of a new wiring pattern including interlayer connections, etc., regarding printed wiring board pattern design device and multilayer pattern processing method for designing multilayer printed wiring board.

This printed wiring board pattern device includes an input device 1, a storage device 5, a display device 2 and a processing part, and produces a wiring pattern for a printed wiring board based on input information from the input device 1. The storage device 5 includes a pattern data file 18 that stores data of the wiring pattern and includes a display requirement data file 17 that stores display requirements inputted from the input device 1. The processing part includes an input processing part 3, an obstruction retrieval processing part 4 and a display processing part 6, and retrieves whether or not obstruction exists, within a display range including designated positions, on other layers during formation in the pattern data file 18 to extract the obstruction, and displays the extracted obstruction in the display range.


Inventors:
KUMAGAI KAZUNORI
ONISHI YUKIHIKO
Application Number:
JP2000090212A
Publication Date:
October 12, 2001
Filing Date:
March 29, 2000
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F17/50; H05K3/00; H05K3/46; (IPC1-7): G06F17/50; H05K3/00; H05K3/46
Attorney, Agent or Firm:
Kiyoshi Manabe (3 people outside)