Title:
PRINTING METHOD IN MULTIPLE CHIP RESISTOR
Document Type and Number:
Japanese Patent JP2788156
Kind Code:
B2
Abstract:
PURPOSE: To reduce the number of screen masks used when a number showing a resistance value is printed by providing punched windows to a screen mask at every places of respective resistors to perform printing through the punched windows.
CONSTITUTION: At the time of the production of tandem type chip resistors Aa, a ceramic material plate Ba formed by arranging a large number of insulating boards 1a to integrate them is used. A screen mask having punched windows having shapes corresponding to the characters showing the resistance values of the respective tandem type chip resistors Aa formed thereto at every places of both resistors forming a pair in the resistors Aa is superposed on the upper surface of the ceramic material plate Ba. Appropriate paint is applied to the surface of the screen mask to print characters D showing the resistance values of the tandem type chip resistors Aa on the resistors Aa of the ceramic material plate Ba.
Inventors:
SAKANE HIDEKATSU
Application Number:
JP24939492A
Publication Date:
August 20, 1998
Filing Date:
September 18, 1992
Export Citation:
Assignee:
ROOMU KK
International Classes:
B41F15/08; B41F15/34; B41F17/36; B41M1/12; (IPC1-7): B41F15/34; B41F15/08; B41F17/36; B41M1/12
Domestic Patent References:
| JP345344A | ||||
| JP438001U |
Attorney, Agent or Firm:
Akio Ishii (2 outside)
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