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Patent Searching and Data


Title:
PROCESS FOR FABRICATING SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2008084899
Kind Code:
A
Abstract:

To form a sufficiently round shape at the upper edge of a trench and to suppress level difference in the vicinity of the trench when it is filled with an insulating material in the process for fabricating a semiconductor device forming an isolation region of STI structure.

The process for fabricating a semiconductor device comprises a step for forming a trench 18 by etching a silicon substrate 11 using a sidewall insulating film 17 consisting of a laminate of at least a silicon oxide film 15 and a silicon nitride film 16 as a mask, a step for fomring a ringlike recess 19 in the sidewall of the trench 18 by etching the silicon oxide film 15 exposed from the silicon nitride film 16 in the trench 18, a step for forming a thermal oxidation film 20 by oxidizing the surface of the silicon substrate 11 exposed in the trench 18 including the recess 19, and a step for depositing an HDP-CVD film 21 on the entire surface including the trench 18.


Inventors:
MORIOKA HITOSHI
Application Number:
JP2006259910A
Publication Date:
April 10, 2008
Filing Date:
September 26, 2006
Export Citation:
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Assignee:
ELPIDA MEMORY INC
International Classes:
H01L21/76
Attorney, Agent or Firm:
Kiyoshi Inagaki