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Title:
PROCESS FOR PRODUCING WIRING BOARD AND PROCESS FOR FABRICATING ELECTRONIC DEVICE
Document Type and Number:
Japanese Patent JP2005223063
Kind Code:
A
Abstract:

To deposit a metal layer only at a required part and to form wiring by a simple production process.

The process for producing a wiring board comprises steps of: (a) providing a surfactant 18 in the first and second regions 12 and 14 of a substrate 10; (b) decomposing inter-atomic bonding in the second region 14 of the substrate 10 by irradiating that region with vacuum UV radiation 22; (c) removing the part of the surfactant 18 provided in the second region 14 by cleaning the substrate 10; (d) providing a catalyst 30 at the part of the surfactant 18 left in the first region 12; and (e) depositing a metal layer 34 on the catalyst 30 to form wiring of the metal layer 34 along the first region 12.


Inventors:
KIMURA SATOSHI
FURUHATA HIDEMICHI
MARUMO MINORU
Application Number:
JP2004028117A
Publication Date:
August 18, 2005
Filing Date:
February 04, 2004
Export Citation:
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Assignee:
SEIKO EPSON CORP
International Classes:
C23C18/16; C23C18/28; H01L21/48; H01L21/60; H01L23/12; C23C18/20; H05K1/03; H05K3/18; H05K3/32; H01L23/498; (IPC1-7): H05K3/18; C23C18/20; C23C18/28; H01L23/12; H05K1/03
Domestic Patent References:
JPS63105973A1988-05-11
JPH10209609A1998-08-07
JPH07188936A1995-07-25
JP2003129247A2003-05-08
JPH0978250A1997-03-25
Attorney, Agent or Firm:
Inoue Ichi
Yukio Fuse
Mitsue Obuchi