Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
PROCESSING METHOD FOR EXTERNAL SEMICONDUCTIVE LAYER OF POWER CABLE
Document Type and Number:
Japanese Patent JPH0819141
Kind Code:
A
Abstract:

PURPOSE: To provide a processing method for the external semiconductive layer of a power cable whereby the treatment time of the layer can be made short in comparison with the case of a molding technique method and the generations of triangular voids can be prevented.

CONSTITUTION: First, an external semiconductive layer 12 of a terminal part 10a of a power cable 10 is peeled off in the direction shown by an arrow, and an insulator 14 is exposed to the outside. Then, to the external semiconductive layer 12 and the insulator 14 which are present respectively before and behind a peeled-off end 16 of the external semiconductive layer 12 in the longitudinal direction of the power cable 10, semiconductive coating materials 18 whose inner peripheral surface shapes correspond respectively to the outer peripheral surfaces of the layer 12 and the insulator 14 which are present respectively before and behind the peeled-off end 16 are applied. Further, the layer 12 and the insulator 14 which are present respectively before and behind the peeled-off end 16 and are coated with the semiconductive coating material 18 are covered with a semiconductive contractive tube body 20. Subsequently, the covered semiconductive contractive tube body 20 is contracted by an adequate heating means 21. Thereby, the semiconductive contractive tube body 20 is adhered to the layer 12 and the insulator 14 which are present respectively before and behind the peeled-off end 16.


Inventors:
NAKAMURA YOSHIHARU
TAKAHASHI YASUHIRO
KURATA MASARU
TATENO FUMINORI
Application Number:
JP14503094A
Publication Date:
January 19, 1996
Filing Date:
June 27, 1994
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
FUJIKURA LTD
International Classes:
H02G1/14; (IPC1-7): H02G1/14
Attorney, Agent or Firm:
Hiromitsu Fujimoto