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Title:
PROCESSING SYSTEM FOR INTEGRATED AMOUNT
Document Type and Number:
Japanese Patent JPS5574644
Kind Code:
A
Abstract:

PURPOSE: To enable to recoginize the incoming signal quickly, with the same degree of the output level as the average level of the input sample, immediately after the start of integration.

CONSTITUTION: The result of calculation of equation 1 is stored to the memory 11 in the time constant τ, and the result of integration before is stored in the memory 12. Taking the n-th input sample value as an and the output of the memory 12 and the operator 16 as Sn-1, Kn', the output of Sn for equation 4 is obtained at the operator 13. 14 is the operator which makes operation every integration, and at the n-th operation, the operation of equation 5 is made from the output K of 11 and the output Kn-1 of the memory 15. Next, the operator 16 performs operation of equation (6) from the outputs K, Kn, Kn-1 of 11, 14, 15. For example, K=0.99, the output is as equation (7), and the output is about the same degree at the average level of the input sample immediately after the start of integration, the recognition is quickened and the effect of noise by itself can be reduced.


Inventors:
KANEKO ISAO
Application Number:
JP14832578A
Publication Date:
June 05, 1980
Filing Date:
November 30, 1978
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
G06F17/18; G06F7/38; (IPC1-7): G06F7/38
Domestic Patent References:
JP45032723A



 
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