Title:
プロセッサ装置、マルチスレッドプロセッサ装置
Document Type and Number:
Japanese Patent JP5433676
Kind Code:
B2
Abstract:
A processor apparatus according to the present invention is a processor apparatus which shares hardware resources between a plurality of processors, and includes: a first determination unit which determines whether or not a register in each of the hardware resources holds extension context data of a program that is currently executed; a second determination unit which determines to which processor the extension context data in the hardware resource corresponds; a first transfer unit which saves and restores the extension context data between programs in the processor; and a second transfer unit which saves and restores the extension context data between programs between different processors.
Inventors:
Takao Yamamoto
Shinji Ozaki
Kakeda Masahide
Nakajima Masayasu
Shinji Ozaki
Kakeda Masahide
Nakajima Masayasu
Application Number:
JP2011501354A
Publication Date:
March 05, 2014
Filing Date:
August 11, 2009
Export Citation:
Assignee:
Panasonic Corporation
International Classes:
G06F9/48; G06F9/46
Domestic Patent References:
| JPH0887420A | 1996-04-02 | |||
| JPH05127926A | 1993-05-25 | |||
| JPH0484335A | 1992-03-17 | |||
| JPH05165652A | 1993-07-02 | |||
| JPH01217635A | 1989-08-31 |
Attorney, Agent or Firm:
Hiromori Arai