PURPOSE: To attain detailed restart processing in response to the level of a fault by supplying the overflow signal of a watchdog timer to a processor according to the value of an error counter when a packet exchange has a fault and performing the restart processing.

CONSTITUTION: When software has a fault like a runaway, etc., a watchdog timer 110 outputs the overflow signal OVF to an error counter 120 and AND circuits 140 and 150 respectively. The counter 120 is renewed by the signal OVF and the output of the counter 120 is outputted via a decoder circuit 130. When the value is less than 2, the circuit 140 is opened to give an input to a non-maskable interruption terminal NMI of a processor PC100. When the counter 120 has the value more than 2, the circuit 150 is opened and the signal OVF supplies a reset signal to a reset terminal RST of the PC100 via a resetting circuit 160. The PC100 is reset to the discontinuation point of interruption of the software when the NMI has an input and restarts its working. Then the PC100 performs the reset processing when the RST has an input to restart its working at and after the initialization.