To freely schedule a memory reference instruction whether it is in an alias relation in compiling is indistinct without deteriorating performance in a microprocessor.

A table 104 storing a memory address which is referred to and the identifier of the instruction is provided on a hardware. The address which is referred to and the identifier of the pertinent instruction are registered with the instruction storing the address which is referre to and the identifier on the table in referring to a memory. When the reference address of the memory reference instruction which is subsequently executed is the same as the registered address, a correction code for the instruction which the identifier stored on the table shows is executed. Thus, the instruction for referring to the memory can freely be scheduled without increasing the number of the instructions which are executed when the instruction is not in the alias relation.