PURPOSE: To decrease the quantity of a digital signal processor (DSP) by providing in common a digital signal processing part for executing an arithmetic processing of a digital signal, and storing plural programs in a program memory part.

CONSTITUTION: In a program memory part 3 of a DSP 4, plural programs P1, P2... Pn are stored, and a program designating part 5 for switching and designating the program executed by a digital signal processing part 2 of the DSP 4 to other program in connection with switching of a digital signal source 1 is provided. Also, the processing part 2 for executing an arithmetic processing of a digital signal is provided in common and plural programs are stored in the memory part 3, therefore, a scale related to the processing part 2 can be curtailed. Moreover, as for that which does not necessitate to process simultaneously plural digital signals, other execution program can be switched by the designating part 5 in connection with switching of the digital signal.