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Title:
PROCESSOR
Document Type and Number:
Japanese Patent JP2009026320
Kind Code:
A
Abstract:

To provide an advanced processor that can use a new technique, and at the same time, that is provided with high performance functionality.

The advanced processor includes a plurality of multithreaded processor cores each having a data cache and instruction cache. A data switch interconnect is coupled to each of the processor cores and configured to pass information among the processor cores. A messaging network is coupled to each of the processor cores and a plurality of communication ports. In one aspect of an embodiment, the data switch interconnect is coupled to each of the processor cores by each data cache, and the messaging network is coupled to each of the processor cores by each message station.


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Inventors:
HASS DAVID T
ZAIDI NAZAR A
RASHID ABBAS
MUKHERJEE BASAB
KAZA ROHINI KRISHNA
RAMIREZ RICARDO
Application Number:
JP2008215090A
Publication Date:
February 05, 2009
Filing Date:
August 25, 2008
Export Citation:
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Assignee:
RMI CORP
International Classes:
G06F15/173; G06F12/08; G06F12/10; G06F12/12; H04L12/56
Domestic Patent References:
JP2005507115A2005-03-10
Foreign References:
WO2003036482A22003-05-01
Attorney, Agent or Firm:
Yoshiyuki Osuga



 
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