PURPOSE: To reduce the hardware for a sum of products operation by forming N pieces of signals consisting of M bits from M pieces of input signals consisting of N bits, inputting these N pieces of signals to address terminals of N pieces of ROMs, bringing output signals from data terminals of the ROMs to digit shift and adding them together.

CONSTITUTION: For instance, five pieces (M = 5) of input signals 11, -, 15 brought to numerical expression by eight bits (N = 8) are divided into eight pieces at every bit, five pieces of divided signals are collected in a lump, and eight pieces of signals consisting of five bits are formed newly. These eight pieces of signals are inputted to address terminals 31, -, 38 of eight pieces of ROMs 21, -, 28, respectively, and by adding together output signals from its data terminals 41, -, 48 by adders 51, -, 57, a final result of sum of products operation is obtained. In such a way, a scale of the hardware for the sum of products operation can be made small.