PURPOSE: To interrupt a program to perform a debugging or the like even in a ROM program system by substituting the ROM program instruction in an arbitrarily designatable address with an arbitrarily settable instruction at the time of program fetch.

CONSTITUTION: The address of a breading point is written in a register 18. When the program stored in a ROM is executed, a processor CPU sets the CPU status to program fetch and puts the ROM address on an address bus AB. A decoding circuit 14 decodes the CPU status and finds the program fetch to output a memory read MEMRD, and an address coincidence detecting circuit 26 compares the address in the register 18 with the address on the address bus AB. When addresses coincide with each other, a control circuit 22 does not output an output enable signal OE (inversion of the high level and the low level) and causes an instruction register 24 to output its set data (an inter rupt instruction or the like) to a data bus DB.