PROGRAM CAPACITY DISPLAY SYSTEM - CASIO COMPUTER CO LTD

Title:

PROGRAM CAPACITY DISPLAY SYSTEM

Document Type and Number:

Japanese Patent JPS573154

Kind Code:

A

Abstract:

PURPOSE: To detect a specific program capacity simply, by calculating and displaying automatically the program capacity written in a certain program area.

CONSTITUTION: For detection of the program capacity of, for example,a P2, the P2 is inputted from a keyboard 10. In a CPU 14, the contents of the P2 area of a program pointer 141 are transferred to a register A, and the contents of an P1 area are transferred to a register B. The contents of the register B are subtracted from the contents of the register A, and the result is written in the register A, and it is displayed on a display part 22 if it is not 0. If it is 0, display data "FREE" is generat ed and is written in a refresh memory 17 and is displayed on the display part 22 by a synchronous control part 20. Use conditions of the whole of the program memory are confirmed also.

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Inventors:

KURAKAKE SHIGEO

Application Number:

JP7632880A

Publication Date:

January 08, 1982

Filing Date:

June 06, 1980

Export Citation:

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Assignee:

CASIO COMPUTER CO LTD

International Classes:

G06F12/16; G06F11/32; G06F11/34; G06F12/02; G06F15/02; (IPC1-7): G06F11/30; G06F15/06; G11C29/00

Next Patent: INPUT AND OUTPUT CONTROL CIRCUIT FOR MEMORY DEVICE