PURPOSE: To reduce the count delay time and make various program branching possible, by constituting the program counter circuit with an adder circuit and a latch circuit.
CONSTITUTION: In case of instructions other than the jump instruction and the skip instruction, "L", "H" and "L" are given to signal input terminals 25, 23 and 24 respectively. In this case, the code signal which is obtained by adding 1 to the output of adder circuit 28 is obtained, and selecting circuit 29 selects the output of circuit 28 and supplies it to latch circuit 21. Consequently, when the clock pulse is supplied to terminal 22, the code signal of output signal terminal 27 is increased by +1. Next, in case of the skip instruction, circuit 28 transfers the code signal increased by 2 to circuit 29 because terminals 25, 23 and 24 become "H", "H" and "L" respectively. Consequently, the output of circuit 28 is supplied to circuit 21, and the code signal incerased by 2 is obtained at terminal 27. Next, in case of the jump instruction, terminals 23 and 24 become "L" and "H" respectively, and circuit 29 selects the signal of signal input terminal 26 to supply it to circuit 21. Consequently, the address code of the jump destination given to terminal 26 is obtained at terminal 27.
JPS49103548A | 1974-10-01 | |||
JPS51124342A | 1976-10-29 | |||
JPS5227332A | 1977-03-01 | |||
JPS5267538A | 1977-06-04 | |||
JPS5275144A | 1977-06-23 |