To provide a program development supporting device capable of stopping a CPU without using any CPU inside signal.

This program development supporting device uses a CPU 5 constituted of an instruction decoder control part 16 for decoding the instruction of the CPU and a program counter 1 to be controlled by the instruction decoder control part 16. The program development supporting device is provided with an address predictor 27 for preliminarily predicting an address to be outputted by the program counter 1, and for predicting the jump address of the destination of branch before the jump address of the destination of branch is outputted by the program counter 1 and an address comparator 4 for comparing a jump address 21 of the destination of branch predicted and outputted by the address predictor 27 with a preliminarily set stop address 9. The instruction decoder control part 16 outputs an address count signal 23 indicating the change of the address to be outputted by the program counter 1 and jump address signals 24 and 25 of the destination of branch obtained as the result of the decoding of the instruction to the address predictor 27.