Title:
プログラマブル導電ランダムアクセスメモリ及びその検知方法
Document Type and Number:
Japanese Patent JP4619004
Kind Code:
B2
Abstract:
A sense circuit for reading a resistance level of a programmable conductor random access memory (PCRAM) cell is provided. A voltage potential difference is introduced across a PCRAM cell by activating an access transistor from a raised rowline voltage. Both a digit line and a digit complement reference line are precharged to a first predetermined voltage. The cell being sensed has the precharged voltage discharged through the resistance of the programmable conductor memory element of the PCRAM cell. A comparison is made of the voltage read at the digit line and at the reference conductor. If the voltage at the digit line is greater than the reference voltage, the cell is read as a high resistance value (e.g., logic HIGH); however, if the voltage measured at the digit line is lower than that of the reference voltage, the cell is read as a low resistance value (e.g., logic LOW).
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Inventors:
Stefan El Casper
Kevin Gee Duesman
Glen Hash
Kevin Gee Duesman
Glen Hash
Application Number:
JP2003570359A
Publication Date:
January 26, 2011
Filing Date:
February 10, 2003
Export Citation:
Assignee:
APPLIED MATERIALS,INCORPORATED
International Classes:
G11C13/00; G11C11/34; G11C13/02; G11C16/28; H01L27/105
Domestic Patent References:
| JP2002008367A | ||||
| JP2001273756A | ||||
| JP2000331473A | ||||
| JP2002260377A |
Foreign References:
| US6314014 | ||||
| WO2000048196A1 |
Attorney, Agent or Firm:
Kenji Sugimura
British tribute
British tribute