PURPOSE: To provide a compact programmable dividing circuit which has the expansion properties by using the registers.

CONSTITUTION: A programmable dividing circuit consists of a clock production circuit 1 which outputs a reference time signal, a power-on reset circuit 2 which outputs the power-on reset with application of a power supply, the shift registers 3-1-3-n which contain plural shift circuits that are cascaded and load in sequence the value set at '1' in number equal to an optional bit number out of (m) bits set previously to repeat the shift operations based on the reference time signal and the power-on reset and then feeds back the final shift output as the shift input of the first stage, and a counter 4 which divides the shift output given from the registers 3-1-3-n by the prescribed frequency into an optional frequency.