Title:
プログラマブルダイナミックレンジ受信器
Document Type and Number:
Japanese Patent JP4259754
Kind Code:
B2
Abstract:
A programmable dynamic range receiver which provides the requisite level of performance at reduced power consumption. The SIGMA DELTA ADC within the receiver is designed with one or more loops. Each loop provides a predetermined dynamic range performance. The loops can be enabled or disabled based on the required dynamic range and a set of dynamic range thresholds. The SIGMA DELTA ADC is also designed with adjustable bias current. The dynamic range of the SIGMA DELTA ADC varies approximately proportional to the bias current. By adjusting the bias current, the required dynamic range can be provided by the SIGMA DELTA ADC with minimal power consumption. A reference voltage of the SIGMA DELTA ADC can be descreased when high dynamic range is not required, thereby allowing for less bias current in the SIGMA DELTA ADC and supporting circuitry. The dynamic range of the SIGMA DELTA ADC is a also function of the oversampling ratio which is proportional to the sampling frequency. High dynamic range requires a high oversampling ratio. When high dynamic range is not required, the sampling frequency can be lowered.
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Inventors:
Eunice, Saed Gee
Bazar Jani, Seiphora S
Chikkareri, Stephen Sea
Bazar Jani, Seiphora S
Chikkareri, Stephen Sea
Application Number:
JP2000524868A
Publication Date:
April 30, 2009
Filing Date:
December 08, 1998
Export Citation:
Assignee:
QUALCOMM INCORPORATED
International Classes:
H03M1/18; H03M3/02; H04B1/16; H04B1/10
Domestic Patent References:
| JP3285424A | ||||
| JP9162739A |
Attorney, Agent or Firm:
Takehiko Suzue
Sadao Muramatsu
Ryo Hashimoto
Toshio Shirane
Sadao Muramatsu
Ryo Hashimoto
Toshio Shirane