Title:
対称的な出力を有するプログラマブル周波数分割器
Document Type and Number:
Japanese Patent JP4979202
Kind Code:
B2
Abstract:
A programmable frequency divider circuit with symmetrical output is disclosed. The frequency divider includes a non-symmetrical LFSR based component operated in series with a symmetrical divider component. Both the LFSR and the symmetrical divider may be programmed to provide flexibility. The frequency divider can dynamically adjust the divisor of the LFSR component to overcome limitations in the divide resolution due to the series combination of dividers, providing even and odd divisor values. The divider architecture can also provide higher level functions, including synchronization of multiple divider outputs, dynamic switching of divisor values and generation of multi-phased and spaced outputs. The linear feedback shift register (LFSR) component includes a feedback logic network decomposed into multiple stages to realize a maximum latch-to-latch operational latency of one gate delay regardless of the size of the LFSR.
Inventors:
John S Austin
Matthew T. Sobel
Matthew T. Sobel
Application Number:
JP2005156444A
Publication Date:
July 18, 2012
Filing Date:
May 27, 2005
Export Citation:
Assignee:
INTERNATIONAL BUSINESS MASCHINES CORPORATION
International Classes:
H03K23/64; G11C19/00; H03B19/00
Domestic Patent References:
| JP2003174359A | ||||
| JP10276083A | ||||
| JP4104614A | ||||
| JP63227119A | ||||
| JP62265815A | ||||
| JP57133728A |
Foreign References:
| US6057719 |
Attorney, Agent or Firm:
Takeshi Ueno
Tasaichi Tanae
Yoshihiro City
Tasaichi Tanae
Yoshihiro City