Title:
PROGRAMMABLE LOGIC CIRCUIT DEVICE AND ERROR DETECTION METHOD
Document Type and Number:
Japanese Patent JP2016167669
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To shorten an error check period of configuration data.SOLUTION: The programmable logic circuit device includes: a configuration memory for storing configuration data; a programmable logic circuit in which a logic circuit is constituted based on configuration data stored in a configuration memory; a control circuit for repeatedly reading out object configuration data compatible with an error check object circuit in the programmable logic circuit in order from the configuration memory, of configuration data in the configuration memory; and an error detection circuit for error-checking the object configuration data read out by the control circuit.SELECTED DRAWING: Figure 8
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Inventors:
UEKUSA SHINICHIRO
Application Number:
JP2015045804A
Publication Date:
September 15, 2016
Filing Date:
March 09, 2015
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
H03K19/177; G06F12/16
Attorney, Agent or Firm:
Kenji Doi
Hayashi Tsunetoku
Hayashi Tsunetoku