PROGRAMMABLE LOGIC CONTROLLER

Title:

PROGRAMMABLE LOGIC CONTROLLER

Document Type and Number:

Japanese Patent JP2022147474

Kind Code:

A

Abstract:

To provide a PLC capable of appropriately diagnosing CPU abnormalities while reducing the memory capacity used for abnormality diagnosis.SOLUTION: A PLC 100 includes a first microcomputer 10 having a first CPU 11, and a second microcomputer 20 having a second CPU 21. The first CPU 11 executes a first calculation for applying processing based on an opcode to an operand, and transmits an opcode used in the first calculation to the second CPU 21. The second CPU 21 executes a second calculation for applying processing based on the received opcode to the operand, and transmits calculation results to the first CPU 11. The first CPU 11 diagnoses whether or not an abnormality has occurred by comparing the calculation results of the first and second calculations. When it is diagnosed that no abnormality has occurred, an opcode generated by executing increment to the opcode used in the present first calculation is used as an opcode to be used in the next first calculation.SELECTED DRAWING: Figure 1

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Inventors:

URAKAWA MORIHIKO

Application Number:

JP2021048729A

Publication Date:

October 06, 2022

Filing Date:

March 23, 2021

Export Citation:

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Assignee:

DENSO WAVE INC

International Classes:

G05B19/05

Attorney, Agent or Firm:

Yamada Tsuyoshi
Hiroshi Matsuda

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