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Title:
PROGRAMMABLE READ ONLY MEMORY
Document Type and Number:
Japanese Patent JPH0229998
Kind Code:
A
Abstract:

PURPOSE: To increase a speed at the time of a reading operation and to reduce power consumption by supplying a base current necessary for absorbing a current, which is small compared with a writing current, to a transistor on an output step.

CONSTITUTION: When the Zener voltage of a Zener diode D1 is preset to a prescribed value while the voltage of a logical voltage area is impressed to an external terminal EXT, the D1 becomes an inactive state, the current is never applied to resistances R10 and R11, a transistor Q8 is turned off, and a transistor Q9 is turned on. Thus, a transistor Q1 is turned off, further, transistors Q2-Q4 are turned off, and a row selecting circuit 2A becomes the inactive state. On the other hand, a transistor Q5 is turned on by an address signal AD, the base current of a transistor Q6 is applied to the transistor Q6 and made the transistor Q6 into an ON state, and a transistor Q7 on the output step is turned on and absorbs a reading current from a row line W with a circuit 2B. The transistor Q7 absorbs the current sufficiently small compared with the writing current. The base current of the transistor Q7 necessary for absorbing this small current is determined by resistances R6 and R7.


Inventors:
MASUDA HAJIME
Application Number:
JP18102588A
Publication Date:
January 31, 1990
Filing Date:
July 19, 1988
Export Citation:
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Assignee:
NEC CORP
International Classes:
G11C17/00; G11C17/06; G11C17/08; G11C17/16; G11C17/18; H01L27/10; (IPC1-7): G11C16/06; G11C17/00; G11C17/06; H01L27/10
Attorney, Agent or Firm:
Shin Uchihara



 
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