PURPOSE: To derive quickly and easily an optimum value of tuning by providing an arithmetic circuit for adding or subtracting a data of a memory circuit, and a data rewriting circuit for rewriting successively a result of calculation to a designated address of a memory.
CONSTITUTION: An initial set value in case when tuning is executed, and a value of suitable fineness corresponding to a deviation in case when a different data is set successively are denoted as DD1 and DD2, respectively. When a switch 8 is operated to turn on, a data of a data containing memory 31 is rewritten successively like (DD1+DD2), (DD1+2×DD2)W(DD1+n×DD2) from DD1, and in case when a subtracting switch 9 is operated, said data is rewritten successively like (DD1-DD2), (DD1-2×DD2)W(DD1-n×DD2) from DD1. In this way, by varying continuously a data at the time of tuning, an optimum value can be derived quickly and easily.
JPS57169803A | 1982-10-19 |