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Title:
保護回路、アレイ基板及び表示パネル
Document Type and Number:
Japanese Patent JP7152313
Kind Code:
B2
Abstract:
There is provided a protective circuit, an array substrate and a display panel. The protective circuit includes: a control sub-circuit (101), having a first end electrically connected to a voltage input terminal (10) and a second end configured to output a common voltage signal supplied by the voltage input terminal (10); and a discharge sub-circuit (102), having a first end electrically connected to the second end of the control sub-circuit (101) and a second end electrically connected to at least one data line (DL1-DLN). The discharge sub-circuit (102) releases electric charges on the at least one data line (DL1-DLN) under the control of the common voltage signal supplied from the control sub-circuit (101).

Inventors:
▲ハオ▼ 学光
▲喬▼ 勇
▲呉▼ 新▲銀▼
Application Number:
JP2018550703A
Publication Date:
October 12, 2022
Filing Date:
November 23, 2017
Export Citation:
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Assignee:
BOE TECHNOLOGY GROUP CO.,LTD.
International Classes:
G09G3/36; G02F1/133; G02F1/1368; G09G3/20
Domestic Patent References:
JP2008096479A
JP2001209355A
JP2008170995A
JP2006308982A
JP2004361571A
Foreign References:
CN101217026A
Attorney, Agent or Firm:
Murayama Yasuhiko
Shinya Mihiro