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Title:
PROTECTION METHOD FOR POWER SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2005143232
Kind Code:
A
Abstract:

To provide a protection method whereby high load operation can be intermittently performed without interrupting an inverter current.

The protection method for power semiconductor devices (1 to 6) is as follows: a thermoelectric cooling module (27) is installed on a heat sink (7), and the temperature of the thermoelectric cooling module is detected by a thermistor (10) installed thereon. A semiconductor device current is computed from a drive signal for turning on/off the gates of the power semiconductor devices, sent out from a PWM control unit (14), and an inverter output current, and the temperature rise between the thermoelectric cooling module and a junction is estimated from the semiconductor device current. When the junction temperature of the power semiconductor devices, computed from the estimated temperature rise and the thermoelectric cooling module temperature exceeds a preset temperature, the current of an inverter circuit is limited and a voltage command is given to the thermoelectric cooling module to cool the power semiconductor devices.


Inventors:
SASAKI AKIRA
Application Number:
JP2003378003A
Publication Date:
June 02, 2005
Filing Date:
November 07, 2003
Export Citation:
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Assignee:
YASKAWA ELECTRIC CORP
International Classes:
H01L23/36; H02H5/04; H02H6/00; H02H7/00; H02H7/122; H02M7/48; (IPC1-7): H02M7/48; H01L23/36; H02H5/04; H02H6/00; H02H7/00; H02H7/122