To provide a protective relay with duplexed protective processing sections which reliably prevents the disadvantage that a breaker trips when both protective processing sections fail simultaneously, in a simple configuration.
The protective relay with duplexed protective processing sections for arithmetic processing includes: arithmetic means 3A, 3B for detecting an anomaly in a power system and issuing an anomaly detection output to control first and second breaker control output contacts; and constant monitoring means 4A, 4B for monitoring an internal state, and in the event of an internal anomaly, inhibiting an action of the first breaker control output contact and generating a bypass command, in response to which a bypass control contact is controlled. The first breaker control output contacts 7A, 7B are connected in series, and in parallel with the first breaker control output contact of each protective processing section, a series connection of one bypass control contact and the second breaker control output contact of the other protective processing section is connected.
TOMOYASU KEISUKE
| JP2011151971A | 2011-08-04 | |||
| JP2000069658A | 2000-03-03 | |||
| JP2006050813A | 2006-02-16 | |||
| JP2011151971A | 2011-08-04 | |||
| JP2000069658A | 2000-03-03 | |||
| JP2006050813A | 2006-02-16 |
Takenaka Ikuo
Keigo Murakami
Kenji Yoshizawa
Next Patent: OUTPUT CHARACTERISTIC CONTROL METHOD