Title:
PROTOCOL MAPPING METHOD
Document Type and Number:
Japanese Patent JP3217878
Kind Code:
B2
Abstract:
PURPOSE: To mutually, freely, and efficiently attain a mapping without being limited by the number of logical paths by a gate way inserted between computers in order to realize a communication between computers whose protocols are different.
CONSTITUTION: Plural computers 21-1-22-4 are connected through logical paths 24-1-24-4 with a gate way 23. Then, each peculiar address is converted into a virtual address commonly used in the gate way 23 at one edge of each logical bus 24 at the gate way 23 side. Ports arbitrarily set at the gate way 23 are linked by a mapping processing which is fixedly uniformed by the virtual address. A link 26 is formed each time a communication request is issued, and opened at each section of the communication.
Inventors:
Takahashi Kuniaki
Masatoshi Motegi
Masatoshi Motegi
Application Number:
JP30645692A
Publication Date:
October 15, 2001
Filing Date:
October 20, 1992
Export Citation:
Assignee:
Oki Electric Industry Co., Ltd.
International Classes:
G06F13/00; H04L12/28; H04L12/46; H04L12/66; H04L69/14; (IPC1-7): H04L12/46; G06F13/00; H04L12/66; H04L29/04; H04L29/06
Domestic Patent References:
| JP3162154A | ||||
| JP2292927A |
Attorney, Agent or Firm:
Yukio Sato