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Title:
PSEUDO-NOISE CODE PHASE SYNCHRONIZATION LEAD-IN METHOD
Document Type and Number:
Japanese Patent JPH06235762
Kind Code:
A
Abstract:

PURPOSE: To reduce the phase synchronization lead-in time of pseudo noise codes by dividing the phase scanning range for one satellite with a plurality of channels for scanning in parallel and then performing the synchronization retention control of an either channel when synchronization is achieved by that channel.

CONSTITUTION: A pseudo noise code control part 1 sets a same code for pseudo noise code generation circuits 2-1-2-8 and at the same time equally divides the phase scanning range of each channel into eight parts for scanning. The generation circuits 2-1-2-8 generate pseudo noise codes according to the code and phase specified by a control part 1 and then multiply them by reception signals by inverse diffusion processing circuits 3-1-3-8 to obtain demodulation signals. Then, the demodulation signal for one period is accumulated, thus judging to see whether synchronization is achieved or not. In this case, when the amplitude of the demodulation signal reaches a certain value in either channel, it is regarded that synchronization is achieved and then the channel is subjected to synchronization retention control, thus enabling the next satellite and the satellite after the next one to be scanned by seven and six channels, respectively.


Inventors:
ISHIGAKI TOSHIHIRO
Application Number:
JP2225893A
Publication Date:
August 23, 1994
Filing Date:
February 10, 1993
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G01S19/30; G01S19/37; H03K5/00; H03L7/00; H04B1/708; H04J13/00; H04L7/00; (IPC1-7): G01S5/14; H03K5/00; H03L7/00; H04J13/00; H04L7/00
Attorney, Agent or Firm:
Akira Kobiji (2 outside)



 
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