Title:
擬似スタティックメモリ装置および電子機器
Document Type and Number:
Japanese Patent JP4139734
Kind Code:
B2
Abstract:
The present invention provides a technique of causing a semiconductor device to output data if a read request not accompanied with an address change is issued. In a first situation in which a write request regarding a first data group is issued, a write operation of the first data group for a first group of memory cells among a set of memory cells selected by the current address is executed. When this occurs, a read operation of a second data group for a second group of memory cells among the set of memory cells is executed on a preliminary basis. The second group of memory cells is different from the first group of memory cells. In a second situation in which a read request for the second data group is issued while the current address is being maintained, the second data group that has been read preliminarily and held is externally output without executing a read operation for the second group of memory cells.
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Inventors:
Eitaro Otsuka
Koichi Mizugaki
Koichi Mizugaki
Application Number:
JP2003138289A
Publication Date:
August 27, 2008
Filing Date:
May 16, 2003
Export Citation:
Assignee:
Seiko Epson Corporation
International Classes:
G11C11/401; G11C11/403; G11C11/406; G11C11/4076
Domestic Patent References:
| JP2002367368A | ||||
| JP2001273762A | ||||
| JP2000260178A | ||||
| JP2000330967A | ||||
| JP6060632A | ||||
| JP7029378A |
Attorney, Agent or Firm:
Meisei International Patent Office
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