PSEUDO VIDEO SIGNAL GENERATING CIRCUIT

Japanese Patent JP3221562

B2

PROBLEM TO BE SOLVED: To reduce number of components by generating a pseudo video signal with a period in matching with a standard of a video signal from a chrominance subcarrier signal (fsc signal).
SOLUTION: The pseudo video signal generating circuit is provided with an oscillation circuit 13 that outputs an internal clock 19 whose frequency is higher than a frequency of an fsc signal, a 1st counter clock generating circuit 25 that generates a counter clock 20 whose frequency is twice that of the fsc signal, a 2nd counter clock generating circuit (consisting of 26, 27, 29) that provides an output of a coincidence signal 34 when an internal count 23 is matched with a value of Max/2 33, and a 4.fsc generating circuit 30 that generates a phase generating clock 22 whose frequency is a multiple of 2n of the frequency of the fsc signal, based on a coincidence signal between the internal clock and the counter clock, and also with a color phase generating circuit 14 that generates a phase signal 21 with a phase difference with respect to the fsc signal, a pseudo synchronizing signal generating circuit (12, 15) that generates a pseudo synchronizing signal 17, and a pseudo video signal output circuit 16 that provides an output of a pseudo video signal 18.

Masao Asai

JP21180197A

October 22, 2001

August 06, 1997

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NC Microsystem Co., Ltd.

H04N5/06; H04N9/44; (IPC1-7): H04N9/44

JP3175793A
JP3166865A
JP1248872A
JP6351033A
JP2685834U

Kiyoshi Inagaki

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