Title:
プルアップ／プルダウン抵抗検証プログラム、プルアップ／プルダウン抵抗検証方法、及び情報処理装置
Document Type and Number:
Japanese Patent JP7147537
Kind Code:
B2
Abstract:
A computer-readable non-transitory recording medium having stored therein a pull-up and pull-down resistor verification program that causes a computer to execute a procedure, the procedure includes reading first definition information to define that a first resistor of a first circuit is a pull-up resistor or a pull-down resistor and second definition information to define that a second resistor of a second circuit is a pull-up resistor or a pull-down resistor, comparing the first definition information and the second definition information, and generating an error message in a case where one of the first resistor and the second resistor is the pull-up resistor and the other one is the pull-down resistor.
Inventors:
Yuji Baba
Application Number:
JP2018234671A
Publication Date:
October 05, 2022
Filing Date:
December 14, 2018
Export Citation:
Assignee:
富士通株式会社
International Classes:
G06F30/398; G06F30/33; G06F30/39
Domestic Patent References:
| JP2014211664A | ||||
| JP201541112A | ||||
| JP39476A |
Attorney, Agent or Firm:
Tadashige Ito
Tadahiko Ito
Tadahiko Ito