PURPOSE: To decrease the number of words of a resolution correction memory by varying a variable quantity fast in real time.

CONSTITUTION: This pulse delay circuit is equipped with a counter 5 which counts a delay quantity more than a reference clock among delay quantities when delay quantity data 6 as information for delaying pulses by a specific time is inputted, a variable delay circuit 11 which delays the pulses by a delay quantity less than the reference clock, and a variable delay circuit 12, and consists of a decision unit 7 which decides whether or not the delay quantity of the variable delay circuit 11 is used, a register 16 which supplies data to the variable delay circuit 11, and the resolution correction memory 2 which transforms the delay quantity data 6 into data to be set in the variable delay circuit 12 and gives a delay time.