Title:
PULSE GENERATING CIRCUIT
Document Type and Number:
Japanese Patent JP3239626
Kind Code:
B2
Abstract:
PURPOSE: To generate a signal having an optional phase and an optional width without decreasing the accuracy due to temperature from a reference signal.
CONSTITUTION: A reference signal of a mode for a selected pulse is generated by a PLL circuit reference signal generating circuit 11 by using reference signal control data (k) and fed to a PLL circuit 12 as a PLL circuit reference signal (e). The PLL circuit 12 generates a PLL circuit output reference signal (d) in phase with the mode reference signal and a clock (g) from the PLL circuit reference signal (e) and gives them to a phase control circuit 13 and a width control circuit 14. The phase control circuit 13 and the width control circuit 14 generate a pulse generating circuit output signal (h) whose phase and width are controlled based on phase control data (i) and width control data (J).
Inventors:
Riki Gotanda
Application Number:
JP20386394A
Publication Date:
December 17, 2001
Filing Date:
August 29, 1994
Export Citation:
Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
H03K3/017; H03L7/06; (IPC1-7): H03L7/06; H03K3/017
Domestic Patent References:
| JP4326865A |
Attorney, Agent or Firm:
Fumio Iwahashi (2 others)