PURPOSE: To easily take a timing and not to generate a mispulse, by obtaining an intermediate timing by which a comparator for a multipulse is operated as a rewrite timing of a sampling and holding circuit.

CONSTITUTION: A fundamental wave is generated by shifting an input signal from an input terminal 8, its positive and negative peaks are detected by peak holding circuits 10, 11, and its values are held in sampling and holding circuits 12, 13 and are applied to a voltage divider 14. Split voltage generated in each tap of the voltage divider 14 is compared with the fundamental wave by a comparator 15, etc., and its output signal is converted to a pulse signal. Intermediate voltage of split voltage for the comparators 15, 16 is generated from the voltage divider 14, is supplied to a comparator 23, also intermediate voltage for comparators 19, 20 is supplied to a comparator 24, is compared with the fundamental wave and a signal is outputted, and its signal is used as a timing for rewriting the sampling and holding circuits 12, 13.