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Patent Searching and Data


Title:
PULSE PATTERN GENERATION CIRCUIT
Document Type and Number:
Japanese Patent JPH02219315
Kind Code:
A
Abstract:

PURPOSE: To immediately recover a state to a normal state when a pulse pattern shows all zeros by providing a first pattern generating means, a second pattern generating means, an all-zero detecting means, and a recovery means, etc.

CONSTITUTION: The first pattern generating means 10(1) generates plural kinds of pulse patterns based on a generating function when the input of an initial pulse pattern is detected. Also, the second pattern generating means 10(2) also generates the same kind of pulse patterns with the same timing as that of the means 10(1) by the initial pattern based on the generating function. Next, when the output of the means 10(2) detects an all-zero state at the all-zero detecting means, the output of the recovery means 60 goes to a load signal, and is sent to the means 10(2), and the output of the means 10(1) at that time is fetched, Then, the means 10(2) is immediately recovered to the pulse patterns with the number of fetched stages. Thereby, the state can immediately be recovered to the normal state as soon as a generating pulse pattern shows all zeros.


Inventors:
HARIGAYA KOICHI
IKUTA KOJI
MORI NORIYUKI
Application Number:
JP4122389A
Publication Date:
August 31, 1990
Filing Date:
February 20, 1989
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H03K3/78; H03K3/84; (IPC1-7): H03K3/78; H03K3/84
Attorney, Agent or Firm:
Sadaichi Igita