PURPOSE: To expand the coding enable range without incurring a large area of the circuit by circulating signal delay circuits connected in a ring with one pulse and forming a high-order bit of a digital signal representing a phase difference in response to number of times of circulation.
CONSTITUTION: A ring delay pulse generating circuit 1 is connected to an OR circuit 1a so that a final end 5 of a gate delay of the circuit 1 is returned to the circuit 1a. As a result, a repetitive pulse PA appears at the left end of the ring delay pulse generating circuit 1 attended with a delay time of all gate delays. When an output of the final end 6 is inputted to a clock terminal of a counter 2, an output 10 of the counter 2 is a high-order bit of an output 9 of an encoder 4. Thus, the signal of the final stage 5 of the gate delay is fed back to the ring delay pulse generating circuit 1 and the gate delay is used for many number of times, the detection range is expanded without incurring remarkable increase in the circuit scale.
| JPS5723330 | PHASE DETECTOR |
| WO/2020/208927 | LIGHT EMISSION DRIVING DEVICE, AND LIGHT-EMITTING DEVICE |
OTSUKA YOSHINORI
HOSHINO KOICHI
NIPPON DENSO CO
| JPS61227422A | 1986-10-09 | |||
| JPS63292819A | 1988-11-30 | |||
| JPH01164118A | 1989-06-28 |