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Patent Searching and Data


Title:
PULSE PHASE DIFFERENCE CODING CIRCUIT
Document Type and Number:
Japanese Patent JPH0799450
Kind Code:
A
Abstract:

PURPOSE: To provide a phase difference coding circuit by which a the number circulation is counted at one location.

CONSTITUTION: A NAND g00 and inverters g01-g62 are connected in series and an output of the inverter g62 and a pulse PA are given to the NAND g00. Furthermore, the NAND and each inverter have an output to a succeeding stage and an output to a pulse selector 20 via one inverter (g00-g620). Moreover, each of the inverters g000-g620 is provided with each of inverters g001-g621 in addition and an inverter g311 is connected to a pulse generator 40. The pulse generator 40 is made to be the inverter constitution similar to that of a ring delay pulse generating circuit 10 and a clock of a counter 1 is a signal rising at a point A and a clock of a counter 2 is a signal inverted by the inverter 41 and rising at a point B. Two counters are operated at one location by using the clock.


Inventors:
AZUMA HIDEJI
WATANABE TAKAMOTO
Application Number:
JP24117093A
Publication Date:
April 11, 1995
Filing Date:
September 28, 1993
Export Citation:
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Assignee:
NIPPON DENSO CO
International Classes:
H03M1/60; G01R25/00; (IPC1-7): H03M1/60
Attorney, Agent or Firm:
Hirohiko Usui