PURPOSE: To improve the response up to binary encoding by making it possible to deal with the counted values or the like of the upper and lower bits of a binary digital signal expressing a pulse phase difference.

CONSTITUTION: A ring oscillator 10 is constituted of a NAND gate NAND1 and 30 inverters INV2 to INV31 and an output from the oscillator 10 is inputted to a delayed pulse generating circuit 20 and counters 41, 43. A start pulse PA starts the oscillating operation of the oscillator and the counting operation of counters 41, 43. Then a binary digital signal to be a counter value obtained when a latch pulse PB is inputted and a binary digital signal from an encoder 33 which indicates the position of a period pulse PCLK in the circuit 20 are respectively set up as an upper bit and a lower bit, so that a binary digital signal expressing a phase difference between the start pulse PA and the latch pulse PB can be directly outputted.