Title:
PULSE POSITION MODULATION CIRCUIT AND TRANSMISSION CIRCUIT
Document Type and Number:
Japanese Patent JP2020031301
Kind Code:
A
Abstract:
To provide a pulse position modulation circuit capable of suppressing fluctuation of pulse width in modulated signals output therefrom.SOLUTION: The pulse position modulation circuit includes: a delay lock loop circuit that includes multiple cascade-connected delay units that delay each input signal by the time width corresponding to a control signal and supplies it to the subsequent delay units; multiple pulse generation circuits each of which generates a pulse with a pulse width corresponding to the phase difference between the first signal and the second signal, each of which is input to one of the multiple delay devices or output from one of the multiple delay devices and has different phases at different timings depending on the state of the first signal and the second signal; and a selection circuit that selectively outputs pulses generated by each of multiple pulse generation circuits.SELECTED DRAWING: Figure 1
Inventors:
SOGA IKUO
Application Number:
JP2018154617A
Publication Date:
February 27, 2020
Filing Date:
August 21, 2018
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
H03K7/04; H03K5/131; H03K5/133; H04B1/04; H04L25/49
Domestic Patent References:
| JP2011205553A | 2011-10-13 | |||
| JP2010538543A | 2010-12-09 | |||
| JP2003198340A | 2003-07-11 |
Foreign References:
| WO2006112193A1 | 2006-10-26 |
Attorney, Agent or Firm:
Atsushi Nakajima
Kato Kazunori
Hiroshi Fukuda
Kato Kazunori
Hiroshi Fukuda