Title:
PULSE POSITION MODULATION COMMUNICATION SYSTEM
Document Type and Number:
Japanese Patent JP3187494
Kind Code:
B2
Abstract:
PURPOSE: To minimize the time required for frame synchronization by eliminating the need for a frame synchronization circuit.
CONSTITUTION: A serial parallel converter 5 converts a transmission data into a parallel data in a transmitter and an M-value data symbol is sent. Then a pulse of one slot length starting from any of M sets of frames corresponding to a slot from a first slot of the frame till (M-1)th slot is inserted to the frame and consecutive frames are sent to a transmission line corresponding to the data symbol used to send the inserted slot position. A pulse interval signal is inputted to a pulse interval measurement circuit in a receiver and a value (j) is subtracted from the input signal and the value is divided by M and its residue is calculated by a calculation circuit and an output of the calculation circuit is used for a reception parallel data.
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Inventors:
Kunihiro Yamada
Application Number:
JP34399491A
Publication Date:
July 11, 2001
Filing Date:
December 02, 1991
Export Citation:
Assignee:
株式会社リコー
International Classes:
H04B14/02; H04B1/7073; H04J13/00; H04L25/49; (IPC1-7): H04B14/02; H04L25/49
Attorney, Agent or Firm:
Akichika Takano