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Patent Searching and Data


Title:
PULSE SIGNAL OUTPUT CIRCUIT
Document Type and Number:
Japanese Patent JP2008205749
Kind Code:
A
Abstract:

To provide a "pulse signal output circuit" which can prevent the generation of a harmonic component which leads EMC (Electro Magnetic Compatibility) interference from a wiring pattern or a signal line of the pulse signal output circuit or succeeding circuits using a simple circuit composition.

For example, a 3-signal summing system of the invention multiplies a first weighting factor (0.2) by an input pulse, forms a first variance pulse which is compressed in a height direction, performs a first delay (1) processing to the pulse, multiplies a second weighting factor (0.6) which forms the necessary wave form height in order to establish a threshold value in a succeeding circuit, forms a second variance pulse which is compressed in the height direction, performs a second delay (2) processing to the pulse, multiplies a third weighting factor (0.2), then forms a third variance pulse which is compressed in the height direction. An adder forms a waveform for establishing the threshold value in an intermediate part of the height direction of the waveform, and a waveform with a step difference in its upper and lower sides by adding these signals. Arbitrary waveforms can be formed by the similar method, such as a 5-signal summing system, etc.


Inventors:
KONDO TSUYOSHI
Application Number:
JP2007038705A
Publication Date:
September 04, 2008
Filing Date:
February 19, 2007
Export Citation:
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Assignee:
ALPINE ELECTRONICS INC
International Classes:
H03K5/12; H03K4/02
Attorney, Agent or Firm:
Yoshio Kimura