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Title:
【発明の名称】パルス切換回路
Document Type and Number:
Japanese Patent JP2906966
Kind Code:
B2
Abstract:
A pulse counter circuit has an invertor which inverts a pulse signal input thereto to form an inverted signal. One of the pulse signal and the inverted signal is selected in response to a selecting signal, and the selected signal is delivered as an output signal. Changeover of a signal to be selected between the pulse signal and the inverted signal is effected at timing of a change in level of the pulse signal. A counter counts pulses of the output signal. A pulse signal changeover circuit selects one of a pulse signal and an inverted signal obtained by inverting the pulse signal, in response to a selecting signal, and the selected signal is delivered as an output signal. The pulse signal is masked by being held at a predetermined level within a predetermined time period, and the inverted signal is masked by being held at the predetermined level within the predetermined time period. Changeover of a signal to be selected between the pulse signal and the inverted signal is effected within the predetermined time period.

Inventors:
MORISHIMA MORIHITO
Application Number:
JP34067193A
Publication Date:
June 21, 1999
Filing Date:
December 08, 1993
Export Citation:
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Assignee:
YAMAHA KK
International Classes:
H03K21/40; H03K21/02; H03K23/00; H03K23/66; (IPC1-7): H03K23/00; H03K21/40
Domestic Patent References:
JP61260714A
JP198320A
Attorney, Agent or Firm:
Kawasakizaki Kenji (1 person outside)