To provide a circuit technology capable of mutually converting a digital value to a pulse width and vice versa with low power consumption and low noise occurring from a circuit.
There provided are a counter 3 for counting clocks and outputting the count value as a digital signal, and a pulse generating means 2 for comparing an input value xi externally input as a digital value with the count value of the counter 3, and outputting an output pulse PWMi having a time width from a predetermined time point until a time point when the input value xi becomes the count value. A plurality of pulse generating means 2 are provided, and the plurality of pulse generating means 2 compare respective input values with the common count value output by the single counter 3.
NAKANO TEPPEI
IWATA ATSUSHI
JPH09247494A | 1997-09-19 | |||
JPS61179618A | 1986-08-12 | |||
JP2000349638A | 2000-12-15 |
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