To provide a pulse width modulation circuit that suppresses noise and a zero crossing distortion, and reduces pop noise by suppressing the generation of a DC offset.

The pulse width modulation circuit includes: a first PWM circuit 3 for pulse-width-modulating a first audio signal to output a first PWM signal; a second pulse PWM circuit 4 for pulse-width-modulating a second audio signal opposite in phase to the first audio signal to output a second pulse PWM signal; a first half bridge 5 for amplifying the first pulse PWM signal; a second half bridge 6 for amplifying the second PWM signal; and delay control circuits 7A, 7B for changing a delay time between the first PWM signal and the second PWM signal by the same delay at every one of leading and trailing edges of the first and second PWM signals until the delay time reaches a set delay time set beforehand.