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Title:
PULSE WIDTH MODULATION SIGNAL OUTPUT DEVICE
Document Type and Number:
Japanese Patent JP2013187651
Kind Code:
A
Abstract:

To provide a pulse width modulation signal output device that outputs a pulse width modulation signal having a short period.

The pulse width modulation signal output device includes: a clock generator 10 for outputting two clock signals; a first counter 12 for counting pulses of the first clock signal CLK1; a second counter 14 for counting pulses of the second clock signal CLK2; a signal output section 16 for outputting a pulse width modulation signal PWM having leading and trailing edges timed on the basis of the timing when a first count value CT1 changes and the timing when a second count value CT2 changes; and a pulse control section 18 for controlling the signal output section 16. In a front half time range and a back half time range of a predetermined time range, the signal output section 16 outputs the pulse width modulation signal PWM having a pulse width defined for each individual time range.


Inventors:
HARADA TOMOYASU
UMENO KOJI
Application Number:
JP2012049875A
Publication Date:
September 19, 2013
Filing Date:
March 07, 2012
Export Citation:
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Assignee:
TOYOTA CENTRAL RES & DEV
International Classes:
H03K7/08; H02M3/00
Domestic Patent References:
JP2008301017A2008-12-11
JP2009290473A2009-12-10
JPS61176208A1986-08-07
JP2008301367A2008-12-11
Attorney, Agent or Firm:
Patent Corporation yki International Patent Office