Title:
PUSH-PULL AMPLIFIER
Document Type and Number:
Japanese Patent JPH0380608
Kind Code:
A
Abstract:
PURPOSE: To improve the gain band width product with the same delay by using a parallel amplifier stage which includes a follower circuit having its input terminal connected to the output terminal of a main amplifier stage and a transimpedance amplifier having its input terminal connected to the input terminal of the main amplifier stage and its output terminal connected to the output terminal of the follower circuit respectively. CONSTITUTION: A main amplifier stage 12 and a parallel amplifier stage 13 are prepared, and the input terminals of both stages 12 and 13 are connected in parallel to each other to receive the common differential voltage input signals. The stage 13 composed of a transimpedance amplifier 14 and a follower circuit 16. The output terminal of the stage 12 is connected to the input terminal of the circuit 16, and the output signal of the stage 12 is added to the output signal of a parallel transimpedance amplifier stage 14 for production of a voltage output signal. As a result, the gain band width product of a push-pull amplifier is larger than that of a single amplifier with its delay set equal to that of the single amplifier. Thus, it's possible to obtain a push-pull amplifier which has the improved gain band width product while keeping the delay of a single stage.
Inventors:
UIRIAMU ETSUCHI TABENPOOTO
Application Number:
JP32811289A
Publication Date:
April 05, 1991
Filing Date:
December 18, 1989
Export Citation:
Assignee:
TORAIKUINTO SEMICONDUCTOR INC
International Classes:
H03F3/26; H03F1/48; H03F3/45; (IPC1-7): H03F3/26; H03F3/45
Attorney, Agent or Firm:
Hidemori Matsukuma
Next Patent: JPH0380609