To provide a PWM (Pulse Width Modulation) semiconductor power converter system in which a plurality of PWM semiconductor power converters operate synchronously to each other without being much affected by noise by a simpler configuration, and also to provide PWM semiconductor power converter.
When a time counter that a master converter has, reaches a predetermined value, the master converter generates synchronizing data, to which an error detecting code has been imparted, and transmits them to a slave converter. On the basis of the error detecting code imparted to the synchronizing data received, the slave converter makes error detection on the synchronizing data received. If no error is detected in the synchronizing data received, the value of the time counter that the master converter has is corrected, on the basis of a value of the time counter that the master converter has, at the time point when the synchronizing data are completely received, and the communication time of the synchronizing data calculated beforehand.
JP2010130793A | 2010-06-10 | |||
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JP2010130793A | 2010-06-10 |
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