To implement a PWM signal generation device capable of generating a high resolution PWM signal even if driven by a clock of a GHz level frequency in a simple design.

Parallel data on which a PWM signal is based is input into two parallel-serial conversion (PS) circuits 1, 2 opposite in the phase of a driving clock CLK to each other. The PS circuit 1 outputs first serial data. The PS circuit 2 outputs second serial data having the same period as the first serial data but a different content or different phase. A two-input OR circuit 4 performs an OR operation on the first serial data and the second serial data and outputs the result as the PWM signal.